In wireless communication applications, it may be desirable to use variable gain amplifiers to amplify received information signals. These amplifiers provide a higher gain when an input signal has a lower level, and a lower gain when an input signal is at a higher level. Variable gain amplifiers, however, may generate direct current (DC) offsets due to component mismatches within each stage of the amplifiers. In wireless applications which require high gain amplifiers, this DC-offset may need to be removed or corrected without compromising data signal integrity.
The DC-offset of a variable gain amplifier may be removed by using certain DC blocking capacitors or feedback loops having various architectures. These techniques may require, however, the use of very high resistance values and capacitors that are too large for integration within microcircuits where space restraints on a die are at a premium. Consequently, there may be a need for improvements in DC-offset correction in variable gain amplifiers that utilize high value resistors with associated low signal distortion.